diff -Nur c3000_pre/linux/arch/arm/config.in c3000_work/linux/arch/arm/config.in --- c3000_pre/linux/arch/arm/config.in 2004-12-03 21:22:15.000000000 +0900 +++ linux/arch/arm/config.in 2004-12-03 20:34:56.000000000 +0900 @@ -478,6 +478,9 @@ if [ "$CONFIG_ARCH_PXA_SPITZ" = "y" ]; then bool 'Use clock change(cccr_change) enable (EXPERIMENTAL)' CONFIG_SL_CCCR_CHANGE fi + if [ "$CONFIG_SL_CCCR_CHANGE" = "y" ]; then + bool 'Core voltage change enable (EXPERIMENTAL)' CONFIG_CHANGE_CORE_VOLT + fi if [ "$CONFIG_ARCH_SHARP_SL" = "y" ]; then define_bool CONFIG_BATT y fi diff -Nur c3000_pre/linux/arch/arm/mach-pxa/pxa27x_power.c c3000_work/linux/arch/arm/mach-pxa/pxa27x_power.c --- c3000_pre/linux/arch/arm/mach-pxa/pxa27x_power.c 2004-11-04 14:13:54.000000000 +0900 +++ linux/arch/arm/mach-pxa/pxa27x_power.c 2004-12-03 21:02:07.000000000 +0900 @@ -324,7 +324,7 @@ return -1; } -#ifdef DEBUG +#if defined(DEBUG) || defined(CONFIG_CHANGE_CORE_VOLT) int pwr_i2c_read( unsigned char device, unsigned char *value ) { unsigned long r; @@ -409,8 +409,8 @@ pwr_i2c_close(); } -#ifdef DEBUG -static unsigned char cpu_xscale_voltage_read(void) +#if defined(DEBUG) || defined(CONFIG_CHANGE_CORE_VOLT) +unsigned char cpu_xscale_voltage_read(void) { unsigned char value=0xff; pwr_i2c_open(); @@ -419,6 +419,16 @@ return value; } +void cpu_xscale_voltage_write(unsigned char value) +{ + if (value > 0x10 ) + return; + value += 0x10; + pwr_i2c_open(); + pwr_i2c_write( 0x0c, value ); + pwr_i2c_close(); +} + #define CLKCFG(a) asm("mrc p14, 0, %0, C6, C0, 0" : "=r"(a)) static void __debug_printk(void) { diff -Nur c3000_pre/linux/arch/arm/mach-pxa/sharpsl_apm.c c3000_work/linux/arch/arm/mach-pxa/sharpsl_apm.c --- c3000_pre/linux/arch/arm/mach-pxa/sharpsl_apm.c 2004-12-03 21:22:15.000000000 +0900 +++ linux/arch/arm/mach-pxa/sharpsl_apm.c 2004-12-03 21:06:20.000000000 +0900 @@ -135,6 +135,11 @@ struct proc_dir_entry *proc_zaurus; #endif +#if defined(CONFIG_CHANGE_CORE_VOLT) +extern unsigned char cpu_xscale_voltage_read(void); +extern void cpu_xscale_voltage_write(unsigned char); +#endif + #if defined(CONFIG_SABINAL_DISCOVERY) #define SHARPSL_AC_LINE_STATUS (( ASIC3_GPIO_PSTS_D & AC_IN )? APM_AC_OFFLINE : APM_AC_ONLINE) #define BACKPACK_IN_DETECT() ( ASIC3_GPIO_PSTS_D & BACKPACK_DETECT ) /* 0: exist , 1: not in */ @@ -1022,6 +1027,44 @@ }; #endif +#if defined(CONFIG_CHANGE_CORE_VOLT) +static ssize_t core_volt_read_params(struct file *file, char *buf, + size_t nbytes, loff_t *ppos) +{ + char outputbuf[32]; + int count; + + if (*ppos>0) /* Assume reading completed in previous read*/ + return 0; + count = sprintf(outputbuf, "0x%02X\n", (unsigned int) cpu_xscale_voltage_read() ); + count++; + *ppos += count; + if (count>nbytes)/* Assume output can be read at one time */ + return -EINVAL; + if (copy_to_user(buf, outputbuf, count+1)) + return -EFAULT; + return count; +} + +static ssize_t core_volt_write_params(struct file *file, const char *buf, + size_t nbytes, loff_t *ppos) +{ + unsigned int param=0; + + sscanf(buf,"%x",¶m); + if (param) { + printk("Change Core voltage = %x.\n", param); + cpu_xscale_voltage_write(param); + } + return nbytes; +} + +static struct file_operations proc_core_volt_params_operations = { + read:core_volt_read_params, + write:core_volt_write_params, +}; +#endif + #ifdef CONFIG_APM_CPU_IDLE #ifdef SHARPSL_NEW_IDLE static int save_icmr; @@ -2835,6 +2878,7 @@ struct proc_dir_entry *lock_fcs_proc; struct proc_dir_entry *power_mode_proc; struct proc_dir_entry *cccr_change_proc; + struct proc_dir_entry *core_volt_proc; apm_info.bios = apm_bios_info; if (apm_info.bios.version == 0) { @@ -2967,6 +3011,14 @@ cccr_change_proc->proc_fops = &proc_cccr_change_params_operations; } #endif + +#if defined(CONFIG_CHANGE_CORE_VOLT) + core_volt_proc = create_proc_entry("zaurus/CoreVolt", 0, NULL); + if (core_volt_proc) { + core_volt_proc->proc_fops = &proc_core_volt_params_operations; + } +#endif + kernel_thread(apm_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD); #if defined(CONFIG_SABINAL_DISCOVERY) || defined(CONFIG_ARCH_PXA_TOSA)